Global Courant 2023-05-15 09:46:09
South Korean Samsung Electronics plans to establish a central research and development (R&D) facility and is likely to build a semiconductor packaging testing line in Japan, initiatives taking place amid a recent rapid improvement in bilateral ties and the ongoing US-driven “decoupling”. of the global technology industry.
According to Japanese and Korean press reports, the world’s largest memory chip maker and second-tier foundry of integrated circuits (ICs) plans to pool its R&D efforts at its Yokohama Research Institute under the name of Device Solution Research Japan (DSRJ). Samsung Electronics previously maintained half a dozen research facilities in Japan.
As reported by Pulse, DSRJ will hire both Japanese and Korean researchers, an arrangement that should facilitate more exchange with Japanese suppliers and customers.
Pulse quoted an unidentified Korean business official as saying: “In the past, there was a perception that we have nothing left to learn from Japan, but Japan is still at the forefront of advanced technology. Samsung Electronics’ new integrated R&D center in Japan could be a signal that the company wants to reconnect with Japan.”
That is – or was – a popular sentiment in South Korea that had a lot to do with historical grudges, but very little with commercial realities. Samsung and SK Hynix, South Korea’s other major semiconductor manufacturer, have long depended on Japanese suppliers for equipment and materials – and vice versa.
Over the past five years, Tokyo Electron – Japan’s largest and the world’s third largest supplier of semiconductor manufacturing equipment – has generated nearly 20% of its sales in South Korea.
Japanese makers of photoresists and other chemicals used in the semiconductor manufacturing process — products in which they hold dominant global market shares — also have significant business in South Korea.
This became a political issue in 2019, when South Korea’s Supreme Court ruled that Japanese companies must compensate Koreans who were forced to work for them during World War II.
Japan responded with export restrictions, causing immense inconvenience and disruption to both Korean customers and Japanese suppliers. Those restrictions were lifted in March this year on the occasion of South Korean President Yoon Suk Yeol’s visit to Tokyo.
Prime Minister Fumio Kishida (R) shakes hands with South Korean President Yoon Suk Yeol (L) ahead of their March 16 meeting at the Prime Minister’s official residence. Image: Twitter
According to DigiTimes, “Samsung stated that this organizational restructuring (of R&D in Japan) has nothing to do with the improvement of governmental relations between South Korea and Japan.”
In other words, it was reportedly a business decision based firmly on the company’s assessment of market conditions and opportunities.
In addition, Samsung is reportedly planning to build a test line for the development of new semiconductor packaging technology in Yokohama at an estimated cost of more than 30 billion yen (US$220 million).
This is an area in which Japanese manufacturers of equipment and materials are particularly strong. Taiwan’s TSMC, the world’s leading IC foundry, opened a 3D IC packaging R&D center in Japan’s Tsukuba Science City almost a year ago. More than 20 Japanese material and equipment companies cooperate with TSMC in Tsukuba.
According to press reports, construction of the packaging facility should begin this year and operation should begin in 2025. Several hundred people will likely be employed. Like TSMC and US memory chipmaker Micron before it, Samsung is expected to receive generous government grants to build semiconductor manufacturing facilities in Japan.
Samsung did not comment on the story, but the amount of detail and the fact that it was front-page news in Japan suggests something is up.
Last December, Samsung established an AVP (Advanced Package) Business Team within its Device Solutions Division. It would be a logical next step to partner with its Japanese suppliers in a prototype development facility in Yokohama.
If TSMC needs to be in Japan to get the most out of Japanese packaging technology, Samsung probably does too. Samsung’s foundry business is still only a third the size of TSMC’s.
This would be Samsung’s first semiconductor manufacturing facility in Japan and a major step forward in cooperation between the two countries’ semiconductor industries. Sony is a customer of Samsung Foundry, but production takes place in Korea. TSMC, Sony and Toyota Group component maker Denso are building a semiconductor manufacturing plant in Kyushu, Japan.
Advanced packaging is intended to overcome the physical limits of miniaturization – to go beyond Moore’s law, the prediction made in 1965 by Intel co-founder Gordon Moore that the density of transistors on an integrated circuit would increase approximately every two years would continue to double.
In the words of Samsung:
“Advanced heterogeneous integration, which interconnects multiple chips horizontally and vertically, allows more transistors to be planted on a single chip (or package) and provide performance that is more powerful than the sum of its parts.”
“Our areas of focus are the development of next generation advanced 2.5D and 3D package solutions based on RDL, Si Interposer/Bridge and TSV stacking technologies.”
These technical terms are defined as follows:
2.5D Package: A package that integrates a single-layer logic semiconductor and multi-layer memory semiconductor together on a substrate. 3D Package: A package in which multiple logic/memory semiconductors are vertically integrated. RDL (Redistribution Layer): Advanced packaging technology that places an additional metal layer between a small and large circuit board to integrate the two. Si Interposer/Bridge: The microcircuit board placed between the IC chip and the circuit board that physically connects the chip and the board by acting as the center wiring. TSV (Through Silicon Via): Advanced package technology that grinds the surface of the chip, drills hundreds of microscopic holes, and connects the electrodes that vertically penetrate the holes in the top and bottom chips.
Samsung’s advanced packaging also includes chiplets, which are “small, modular chips that can be combined to form a larger, more complex system-on-a-chip (SoC).
They offer a number of advantages over traditional monolithic chips, including improved performance, cost savings and design flexibility.
Along with die crimping to 3nm and below, advanced packaging is the leading technology for semiconductor manufacturing.
South Korean President Yoon and Japanese Prime Minister Fumio Kishida will meet at the G7 summit in Hiroshima, scheduled for May 19-21. More information about Samsung’s investments and other economic cooperation between South Korea and Japan may be announced at the event.
Follow this writer on Twitter: @ScottFo83517667
Similar:
Loading…
